Title :
Retrograde-Mask Processed Polysilicon TFT for High Performance, Planar Structure, and Stable Operation
Author :
Jae Hyo Park ; Hyung Yoon Kim ; Ki Hwan Seok ; Kiaee, Zohreh ; Sol Kyu Lee ; Hee Jae Chae ; Yong Hee Lee ; Jae Ho Lee ; Seung Ki Joo
Author_Institution :
Dept. of Mater. Sci. & Eng., Seoul Nat. Univ., Seoul, South Korea
Abstract :
We fabricated polysilicon thin-film transistors (TFTs) using a retrograde-mask process (RMP) showing high electrical performance, planar geometry, and stable driving characteristics. The electrical performance of RMP polysilicon TFT was compared with conventional metal-induced laterally crystallized (MILC) polysilicon TFTs. The fabrication process changed the masking steps of the conventional pattern, but did not require an additional mask. It was found that the conventional MILC poly-Si TFT typically showed a hump current, and had a serious reliability problem due to the NiSi2 contamination at the corner edges and geometry effect. One the other hand, an RMP poly-Si TFT improved the hump and the TFT´s reliability due to the absent of NiSi2 at the edges and the large effective channel length and width.
Keywords :
crystallisation; nickel compounds; semiconductor device reliability; surface contamination; thin film transistors; NiSi2; electrical performance; metal-induced laterally crystallization; nickel silicide contamination; planar geometry; planar structure; polysilicon TFT; polysilicon thin-film transistors; reliability problem; retrograde-mask process; stable operation; Contamination; Geometry; Logic gates; Reliability; Stress; Thin film transistors; Metal-induced lateral crystallization (MILC); polysilicon thin-film transistors; short-channel effect;
Journal_Title :
Electron Device Letters, IEEE
DOI :
10.1109/LED.2015.2438871