DocumentCode
819765
Title
Low-Complexity Policies for Energy-Performance Tradeoff in Chip-Multi-Processors
Author
Elyada, Avshalom ; Ginosar, Ran ; Weiser, Uri
Author_Institution
Electr. Eng. Dept., Technion - Israel Inst. of Technol., Haifa
Volume
16
Issue
9
fYear
2008
Firstpage
1243
Lastpage
1248
Abstract
Chip-multi-processor (CMP) utilize multiple energy-efficient processing elements (PEs) to deliver high performance while reducing energy-consumption. Dynamic frequency-Voltage Scaling (DVS) balances performance and energy consumption by varying PEs´ frequency-voltage workpoints to save energy while meeting performance requirements. We consider multi-task CMP applications with unknown workloads, and dynamically set workpoints to minimize . Heuristic policies for serial/parallel task-graphs are investigated. We compare these policies to a theoretical bound and show that they achieve good results with low complexity. In most cases the simplest policy, which usually assigns constant workpoints, is also the most cost-effective one.
Keywords
computational complexity; microprocessor chips; multiprocessing systems; performance evaluation; power aware computing; chip-multiprocessors; dynamic frequency-voltage scaling; energy consumption; energy-performance tradeoff; low-complexity policies; multiple energy-efficient processing elements; performance requirements; task graphs; Chip-multi-processor (CMP); dynamic voltage scaling; low power; slack utilization;
fLanguage
English
Journal_Title
Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
Publisher
ieee
ISSN
1063-8210
Type
jour
DOI
10.1109/TVLSI.2008.2000867
Filename
4581640
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