DocumentCode :
820222
Title :
Multilevel Full-Chip Gridless Routing With Applications to Optical-Proximity Correction
Author :
Tai-Chen Chen ; Yao-Wen Chang
Author_Institution :
Graduate Inst. of Electron. Eng., Nat. Taiwan Univ., Taipei
Volume :
26
Issue :
6
fYear :
2007
fDate :
6/1/2007 12:00:00 AM
Firstpage :
1041
Lastpage :
1053
Abstract :
To handle modern routing with nanometer effects, we need to consider designs with variable wire/via widths and spacings, for which gridless-routing approaches are desirable due to its great flexibility. In this paper, we introduce a gridless-routing model that can obtain design-rule-correct paths and avoid redundant wires. Besides, we propose an enhanced model for the gridless-routing model to reduce the solution space and the runtime. Based on the enhanced gridless-routing model, we present the first multilevel full-chip gridless detailed router (called MGR). The router integrates global routing, detailed routing, and congestion estimation together at each level of multilevel routing. It can handle designs with nonuniform wire/via widths and spacings and consider routability and optical-proximity correction. Experimental results show that MGR achieves the best routing solutions in smaller running times than previous works, based on a set of commonly used benchmarks (with uniform and nonuniform wire widths) and a set of real industrial benchmarks (with a versatile set of design rules)
Keywords :
design for manufacture; estimation theory; network routing; optimisation; congestion estimation; design for manufacturing; design-rule-correct paths; global routing; gridless routing; multilevel full-chip; multilevel optimization; optical-proximity correction; variable wire/via widths; Circuits; Design for manufacture; Design optimization; Manufacturing industries; Optical design; Partitioning algorithms; Routing; Runtime; Wire; Design for manufacturing (DFM); gridless routing; multilevel optimization; optical-proximity correction (OPC); physical design; routing;
fLanguage :
English
Journal_Title :
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Publisher :
ieee
ISSN :
0278-0070
Type :
jour
DOI :
10.1109/TCAD.2006.884492
Filename :
4167996
Link To Document :
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