DocumentCode
820534
Title
Radiation Hardened CMOS/SOS
Author
Aubuchon, K.G. ; Harari, E.
Author_Institution
Hughes Aircraft Company Newport Beach, California 92663
Volume
22
Issue
6
fYear
1975
Firstpage
2181
Lastpage
2184
Abstract
This paper reports the results of experiments designed to optimize the total dose ionizing radiation hardness of CMOS/SOS devices. Type 4007 inverter circuits were fabricated with variations in the process, including wet versus dry gate oxidation. Tolerable values (e. g. < l¿A per mil of channel width) of post-radiation n-channel back leakage were obtained only with wet oxides. Threshold shifts of ¿1V for the n-channel devices and ¿2V for the p-channel devices were obtained after 106 rads (Si) on the best devices fabricated.
Keywords
Aircraft; Circuits; Design optimization; Inverters; Ionizing radiation; Oxidation; Photoconductivity; Radiation hardening; Silicon; Voltage;
fLanguage
English
Journal_Title
Nuclear Science, IEEE Transactions on
Publisher
ieee
ISSN
0018-9499
Type
jour
DOI
10.1109/TNS.1975.4328101
Filename
4328101
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