A new DSP-oriented algorithm for calculation of the square root using a nonlinear digital filter

Author

Mikami, Naoki ; Kobayashi, Masaki ; Yokoyama, Yukiko

Author_Institution

Dept. of Inf. & Comput. Sci., Univ. of Ind. Technol., Sagamihara, Kanagawa, Japan

Volume

40

Issue

7

fYear

1992

fDate

7/1/1992 12:00:00 AM

Firstpage

1663

Lastpage

1669

Abstract

A high-speed algorithm for calculating the square root is proposed. This algorithm, which can be regarded as calculation of the step response of a kind of nonlinear IIR filter, requires no divisions. Therefore, it is suitable for a VLSI digital signal processor (DSP) which has a high-speed hardware multiplier but does not usually have a high-speed hardware divider. The convergence properties of the algorithm are analyzed and used to develop a practical implementation of the procedure. It is implemented on the commercially available DSP (TM320C25) and is compared with the Newton-Raphson method. The proposed algorithm has two advantages over the Newton-Raphson method: higher execution speed and smaller calculation error

Keywords

computerised signal processing; convergence; digital arithmetic; digital filters; DSP-oriented algorithm; Newton-Raphson method; TM320C25; VLSI digital signal processor; convergence properties; fast square root calculation; filter step response; high-speed hardware multiplier; nonlinear IIR filter; nonlinear digital filter; Convergence; Digital filters; Digital signal processing; Digital signal processing chips; Digital signal processors; Hardware; IIR filters; Newton method; Signal processing algorithms; Very large scale integration;

fLanguage

English

Journal_Title

Signal Processing, IEEE Transactions on

Publisher

ieee

ISSN

1053-587X

Type

jour

DOI

10.1109/78.143438

Filename

143438