CORDIC-based VLSI architectures for digital signal processing

Author

Hu, Yu Hen

Author_Institution

Dept. of Electr. & Comput. Eng., Wisconsin Univ., Madison, WI, USA

Volume

9

Issue

3

fYear

1992

fDate

7/1/1992 12:00:00 AM

Firstpage

16

Lastpage

35

Abstract

The evolution of CORDIC, an iterative arithmetic computing algorithm capable of evaluating various elementary functions using a unified shift-and-add approach, and of CORDIC processors is reviewed. A method to utilize a CORDIC processor array to implement digital signal processing algorithms is presented. The approach is to reformulate existing DSP algorithms so that they are suitable for implementation with an array performing circular or hyperbolic rotation operations. Three categories of algorithm are surveyed: linear transformations, digital filters, and matrix-based DSP algorithms.<>

Keywords

VLSI; computerised signal processing; digital filters; digital signal processing chips; CORDIC processor array; DSP algorithms; VLSI architectures; circular rotation; digital filters; digital signal processing; hyperbolic rotation; iterative arithmetic computing algorithm; linear transformations; matrix-based DSP algorithms; unified shift-and-add approach; Arithmetic; Computer architecture; Digital filters; Digital signal processing; Iterative algorithms; Iterative methods; Signal processing algorithms; Very large scale integration;

fLanguage

English

Journal_Title

Signal Processing Magazine, IEEE

Publisher

ieee

ISSN

1053-5888

Type

jour

DOI

10.1109/79.143467

Filename

143467