DocumentCode :
821758
Title :
A comparative study of access topologies for chip-level address-event communication channels
Author :
Culurciello, Eugenio ; Andreou, Andreas G.
Author_Institution :
Electr. & Comput. Eng. Dept., Johns Hopkins Univ., Baltimore, MD, USA
Volume :
14
Issue :
5
fYear :
2003
Firstpage :
1266
Lastpage :
1277
Abstract :
We examine channel access algorithms and circuits for intra and inter chip communication channels. Classical access techniques such as arbitration, scanning, ALOHA, and priority encoding are compared by assessing throughput, latency, and power consumption. Our results provide guidance in the design of bio-inspired networks of processors, for efficient transmission of information with limited power consumption and reduced latency.
Keywords :
VLSI; access protocols; network topology; neural chips; ALOHA; access topologies; arbitration; bio-inspired networks; channel access algorithms; chip-level address-event communication channels; inter chip communication channels; intra chip communication channels; latency; neural network; power consumption; priority encoding; scanning; throughput; Communication channels; Computer architecture; Delay; Energy consumption; Energy efficiency; Humans; Neuromorphics; Neurons; Throughput; Topology;
fLanguage :
English
Journal_Title :
Neural Networks, IEEE Transactions on
Publisher :
ieee
ISSN :
1045-9227
Type :
jour
DOI :
10.1109/TNN.2003.816385
Filename :
1243726
Link To Document :
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