DocumentCode :
822338
Title :
How circuit size affects parallelism
Author :
Bailey, Mary L.
Author_Institution :
Dept. of Comput. Sci., Arizona Univ., Tucson, AZ, USA
Volume :
11
Issue :
2
fYear :
1992
fDate :
2/1/1992 12:00:00 AM
Firstpage :
208
Lastpage :
215
Abstract :
The author addresses the issue of how well circuit parallelism scales with circuit size. Empirical studies using a single representation, switch-level, and two different timing models are presented. The results show that, in general, parallelism does not scale linearly with circuit size, and that the relationship between parallelism and circuit size is much more complex. The author first describes the simulators and methodology used to measure circuit parallelism. The circuit parallelism and percentage of parallelism of nine circuits, ranging in size from 200 to 61600 transistors, are described. Parallelism measurements from different instances of three circuit families are presented to show that, even within circuit families, relative parallelism is not constant for different instances
Keywords :
circuit analysis computing; digital circuits; circuit parallelism; circuit size; simulators; switch level representation; timing models; Circuit simulation; Computational modeling; Concurrent computing; Discrete event simulation; Hardware; Parallel processing; Partitioning algorithms; Processor scheduling; Size measurement; Timing;
fLanguage :
English
Journal_Title :
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Publisher :
ieee
ISSN :
0278-0070
Type :
jour
DOI :
10.1109/43.124399
Filename :
124399
Link To Document :
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