DocumentCode :
822659
Title :
Tailor: a layout system based on trapezoidal corner stitching
Author :
Marple, David ; Smulders, Michiel ; Hegen, Henk
Author_Institution :
Philips Res. Lab., Eindhoven, Netherlands
Volume :
9
Issue :
1
fYear :
1990
fDate :
1/1/1990 12:00:00 AM
Firstpage :
66
Lastpage :
90
Abstract :
A VLSI layout design system named Tailor is described. Tailor operates on hierarchical layouts containing 45° multiple angles. It consists of a well-integrated set of tools, including a window-driven editor, an incremental design rule checker, a circuit extractor, a one-dimensional compactor, a channel-based global router, and a transistor size optimizer. All tools use the same user interface and operate directly on Tailor´s trapezoidal corner stitched database. Tailor´s database structure is well suited for all of the tools because all important database operations, such as point searching, neighbor searching, area searching, and shadow searching, function very efficiently. All the tools in Tailor, except transistor optimization and routing, work directly on the layout hierarchy, which provides even greater efficiency
Keywords :
VLSI; circuit layout CAD; database management systems; Tailor; VLSI layout; area searching; channel-based global router; circuit extractor; database operations; hierarchical layouts; incremental design rule checker; layout system; neighbor searching; one-dimensional compactor; point searching; shadow searching; transistor size optimizer; trapezoidal corner stitching; window-driven editor; Circuits; Data structures; Databases; Design optimization; Layout; Routing; Solid modeling; Timing; User interfaces; Very large scale integration;
fLanguage :
English
Journal_Title :
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Publisher :
ieee
ISSN :
0278-0070
Type :
jour
DOI :
10.1109/43.45858
Filename :
45858
Link To Document :
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