Title :
Board-level reliability of Pb-free solder joints of TSOP and various CSPs
Author :
Yoon, Seung Wook ; Hong, Jun Ki ; Kim, Hwa Jung ; Byun, Kwang Yoo
Author_Institution :
Inst. of Microelectron., Singapore
fDate :
4/1/2005 12:00:00 AM
Abstract :
To evaluate various Pb-free solder systems for leaded package, thin small outline packages (TSOPs) and chip scale packages (CSPs) including leadframe CSP (LFCSP), fine pitch BGA (FBGA), and wafer level CSP (WLCSP) were characterized in terms of board level and mechanical solder joint reliability. For board level solder joint reliability test of TSOPs, daisy chain samples having pure-Sn were prepared and placed on daisy chain printed circuit board (PCB) with Pb-free solder pastes. For CSPs, the same composition of Pb-free solder balls and solder pastes were used for assembly of daisy chain PCB. The samples were subjected to temperature cycle (T/C) tests (-65°C∼150°C, -55°C∼125°C, 2 cycles/h). Solder joint lifetime was electrically monitored by resistance measurement and the metallurgical characteristics of solder joint were analyzed by microstructural observation on a cross-section sample. In addition, mechanical tests including shock test, variable frequency vibration test, and four point twisting test were carried out with daisy chain packages too. In order to compare the effect of Pb-free solders with those of Sn-Pb solder, Sn-Pb solder balls and solder paste were included. According to this paper, most Pb-free solder systems were compatible with the conventional Sn-Pb solder with respect to board level and mechanical solder joint reliability. For application of Pb-free solder to WLCSP, Cu diffusion barrier layer is required to block the excessive Cu diffusion, which induced Cu trace failure.
Keywords :
chip scale packaging; failure analysis; printed circuit testing; reliability; solders; -65 to 150 C; Cu diffusion barrier layer; Cu trace failure; Pb-free solder balls; Pb-free solder joints; Pb-free solder pastes; Sn-Pb solder; ball grid array; board-level reliability; chip scale packages; chip scale packaging; daisy chain printed circuit board; failure analysis; fine pitch BGA; leaded package; leadframe CSP; mechanical solder joint reliability; mechanical tests; metallurgical characteristics; microstructural observation; resistance measurement; shock test; temperature cycle; thin small outline packages; twisting test; variable frequency vibration test; wafer level CSP; Assembly; Chip scale packaging; Circuit testing; Electrical resistance measurement; Lead; Monitoring; Printed circuits; Soldering; Temperature; Wafer scale integration; Board level solder joint reliability test; Pb-free solders; chip scale package (CSP); failure analysis; fine pitch BGA (FBGA); leadframe CSP (LFCSP); microstructure; thin small outline package (TSOP); wafer level CSP (WLCSP);
Journal_Title :
Electronics Packaging Manufacturing, IEEE Transactions on
DOI :
10.1109/TEPM.2005.847398