Fully Pipelined Low-Cost and High-Quality Color Demosaicking VLSI Design for Real-Time Video Applications

This brief presents a fully pipelined color demosaicking design. To improve the quality of reconstructed images, a linear deviation compensation scheme was created to increase the correlation between the interpolated and neighboring pixels. Furthermore, immediately interpolated green color pixels are first to be used in hardware-oriented color demosaicking algorithms, which efficiently promoted the quality of the reconstructed image. A boundary detector and a boundary mirror machine were added to improve the quality of pixels located in boundaries. In addition, a hardware sharing technique was used to reduce the hardware costs of three interpolators. The very-large-scale integration architecture in this brief contains only 4.97 K gate counts, and the core area is 60 229 μm² synthesized by using 0.18-μm CMOS process. Compared with the previous low-complexity designs, this work has the benefits in terms of low cost, low power consumption, and high performance.