DocumentCode :
824609
Title :
An optimal Steiner tree algorithm for a net whose terminals lie on the perimeter of a rectangle
Author :
Cohoon, James P. ; Richards, Dana S. ; Salowe, Jeffrey S.
Author_Institution :
Dept. of Comput. Sci., Virginia Univ., Charlottesville, VA, USA
Volume :
9
Issue :
4
fYear :
1990
fDate :
4/1/1990 12:00:00 AM
Firstpage :
398
Lastpage :
407
Abstract :
Given a set of input points, the rectilinear Steiner tree problem is to find a minimal-length tree consisting of vertical and horizontal line segments that connects the input points, where it is possible to add new points to minimize the length of the tree. The restricted Steiner tree problem in which all the input points lie on the boundary of a rectangle frequently occurs in VLSI physical design. Since the fastest published algorithm is cubic in the size of the point set, VLSI designers have been forced to use heuristic approximations to the length of the Steiner tree for this problem. A simple, practical, linear-time exact algorithm for finding the Steiner tree for points lying on the boundary of a rectangle which obviates the need for some heuristic algorithms in VLSI design is presented. The analysis of the algorithm is based on the use of a tie-breaking rule that should prove useful for other Steiner tree problems
Keywords :
VLSI; circuit layout CAD; network topology; trees (mathematics); CAD; VLSI design; layout; linear-time exact algorithm; optimal Steiner tree algorithm; rectangle perimeter; tie-breaking rule; Algorithm design and analysis; Computer science; Helium; Phase estimation; Polynomials; Road transportation; Routing; Very large scale integration; Wire; Wiring;
fLanguage :
English
Journal_Title :
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Publisher :
ieee
ISSN :
0278-0070
Type :
jour
DOI :
10.1109/43.45871
Filename :
45871
Link To Document :
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