DocumentCode :
82469
Title :
A Subharmonically Injection-Locked PLL With Calibrated Injection Pulsewidth
Author :
Chih-Lu Wei ; Ting-Kuei Kuan ; Shen-Iuan Liu
Author_Institution :
Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei, Taiwan
Volume :
62
Issue :
6
fYear :
2015
fDate :
Jun-15
Firstpage :
548
Lastpage :
552
Abstract :
A subharmonically injection-locked phase-locked loop (SIPLL) using a pulsewidth-calibrated loop is presented. The injection timing and the pulsewidth of the injected pulse are calibrated to tolerate the process variations. This SIPLL is fabricated in a 40-nm CMOS process. The measured output frequency ranges from 0.4 to 1.6 GHz. Its power is 1.49 mW for a supply of 1.1 V at 1.6 GHz. The root-mean-square jitter is 2.29 ps.
Keywords :
CMOS integrated circuits; UHF integrated circuits; UHF oscillators; phase locked loops; CMOS; frequency 0.4 GHz to 1.6 GHz; injected pulse; injection timing; phase locked loops; power 1.49 mW; pulsewidth-calibrated loop; root-mean-square jitter; size 40 nm; subharmonically injection-locked PLL; time 2.29 ps; voltage 1.1 V; Clocks; Frequency measurement; Jitter; Phase locked loops; Phase noise; Timing; Voltage-controlled oscillators; Phase noise; phase noise; phase-locked loop; phase-locked loop (PLL); pulse-width-calibrated loop; pulsewidth-calibrated loop (PWCL); sub-harmonically injection-locked; subharmonically injection locked;
fLanguage :
English
Journal_Title :
Circuits and Systems II: Express Briefs, IEEE Transactions on
Publisher :
ieee
ISSN :
1549-7747
Type :
jour
DOI :
10.1109/TCSII.2015.2407753
Filename :
7051229
Link To Document :
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