Title :
Lossless vector-quantised index coding design and implementation
Author :
Chen, P.-Y. ; Yu, C.-T.
Author_Institution :
Dept. of Comput. Sci. & Inf. Eng., Nat. Cheng Kung Univ., Tainan, Taiwan
fDate :
4/8/2005 12:00:00 AM
Abstract :
The authors present a simple and fast online lossless compression design to encode the vector quantised indexes for 2-D still images. The computation complexity of the method is quite low and its memory requirement is small. Experimental simulations show that the proposed scheme achieves better compression efficiency than existing lossless index coding schemes. An efficient VLSI architecture for this scheme is developed and yields a processing rate of about 83.3 mega-indexes per second. The hardware architecture is implemented using an Altera FPGA chip. A demonstration system is also built by integrating the chip with an 8051 microprocessor to verify the performance of the VLSI architecture.
Keywords :
VLSI; computational complexity; field programmable gate arrays; image coding; vector quantisation; 2D still images; 8051 microprocessor; Altera FPGA chip; VLSI architecture; compression efficiency; computation complexity; demonstration system; hardware architecture; lossless index coding; memory requirement; online lossless compression design; vector quantised indexes;
Journal_Title :
Circuits, Devices and Systems, IEE Proceedings -
DOI :
10.1049/ip-cds:20041139