DocumentCode :
825969
Title :
Measuring Power Distribution System Resistance Variations
Author :
Helinski, Ryan ; Plusquellic, Jim
Author_Institution :
Dept. of Electr. & Comput. Eng., Univ. of New Mexico, Albuquerque, NM
Volume :
21
Issue :
3
fYear :
2008
Firstpage :
444
Lastpage :
453
Abstract :
Metal resistance variations in back-end-of-line processes can be significant, particularly during process bring-up. In this paper, we propose a simple method to measure resistance variations in the power distribution system (PDS) of an IC. Our technique utilizes the PDS because it is an existing distributed resource in all ICs and provides a means of characterizing resistance in the context of the actual circuit design. By applying a set of tests using small on-chip support circuits attached to the PDS, the resistance of components of the PDS can be obtained from the solution to a set of simultaneous equations. The results from hardware experiments involving two sets of test chips fabricated in an IBM 65-nm technology show significant changes in the resistance variation of some components of the PDS as the process evolved.
Keywords :
electric resistance measurement; integrated circuit design; integrated circuit testing; power supply circuits; IBM 65-nm technology; on-chip support circuits; power distribution system; resistance variations; Circuit synthesis; Circuit testing; Delay; Electric resistance; Electrical resistance measurement; Equations; Hardware; Integrated circuit interconnections; Power distribution; Power measurement; Process variation; power distribution system; resistance variations;
fLanguage :
English
Journal_Title :
Semiconductor Manufacturing, IEEE Transactions on
Publisher :
ieee
ISSN :
0894-6507
Type :
jour
DOI :
10.1109/TSM.2008.2001222
Filename :
4589034
Link To Document :
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