DocumentCode
825987
Title
Restructuring WSI hexagonal processor arrays
Author
Venkateswaran, R. ; Mazumder, Pinaki ; Shin, Kang G.
Author_Institution
Dept. of Electr. Eng. & Comput. Sci., Michigan Univ., Ann Arbor, MI, USA
Volume
11
Issue
12
fYear
1992
fDate
12/1/1992 12:00:00 AM
Firstpage
1574
Lastpage
1585
Abstract
A host-driven reconfiguration scheme, called HEX-REPAIR, is proposed for hexagonal processor arrays characterized by a large number of relatively simple cells. Such arrays have been shown to be the most efficient for many digital signal processing applications, such as matrix multiplication, and for some classes of filtering operations. Reconfiguration for these arrays is made difficult by the asymmetric nature of the interconnection network and the need for keeping the switching overheads at a minimum. The algorithm presented meets these requirements. In addition, it has excellent fault-coverage characteristics, even in the presence of multiple faults, and can accommodate multiple rows/columns of spare cells. The restructured array is transparent to users and no modification is required in any application program using the array
Keywords
VLSI; cellular arrays; digital signal processing chips; multiprocessor interconnection networks; redundancy; HEX-REPAIR; WSI hexagonal processor arrays; digital signal processing applications; fault-coverage characteristics; filtering operations; host-driven reconfiguration scheme; interconnection network; matrix multiplication; multiple faults; spare cells; Digital filters; Digital signal processing; Filtering; Logic arrays; Manufacturing; Multiprocessor interconnection networks; Signal processing algorithms; Switches; Ultra large scale integration; Wafer scale integration;
fLanguage
English
Journal_Title
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Publisher
ieee
ISSN
0278-0070
Type
jour
DOI
10.1109/43.180268
Filename
180268
Link To Document