• DocumentCode
    826117
  • Title

    Advanced fault collapsing (logic circuits testing)

  • Author

    Lloy, Antonio

  • Author_Institution
    Dipartimento Autom. e Inf., Politecnico di Torino, Italy
  • Volume
    9
  • Issue
    1
  • fYear
    1992
  • fDate
    3/1/1992 12:00:00 AM
  • Firstpage
    64
  • Lastpage
    71
  • Abstract
    The partitioning of faults into equivalence classes so that only one representative fault per class must be explicitly considered in fault simulation and test generation, called fault collapsing, is addressed. Two types of equivalence, which are relevant to the work reported, are summarized. New theorems on fault equivalence and dominance, forming the basis of an algorithm that collapses all the structurally equivalent faults in a circuit, plus many of the functionally equivalent faults, are presented. Application of the algorithm to a set of benchmark circuits establishes that identification of functionally equivalent faults is feasible, and that, in some cases, they are a large fraction of the faults in a circuit. The collapsing algorithm applies not only to combinational designs but to synchronous sequential circuits as well.<>
  • Keywords
    fault location; logic circuits; logic testing; benchmark circuits; combinational designs; dominance; equivalence classes; fault collapsing; fault simulation; functionally equivalent faults; partitioning of faults; synchronous sequential circuits; test generation; Benchmark testing; Boolean functions; Circuit faults; Circuit simulation; Circuit testing; Computational modeling; Computer simulation; Fault diagnosis; Logic circuits; Logic testing;
  • fLanguage
    English
  • Journal_Title
    Design & Test of Computers, IEEE
  • Publisher
    ieee
  • ISSN
    0740-7475
  • Type

    jour

  • DOI
    10.1109/54.124518
  • Filename
    124518