Electrical and Reliability Investigation of Cu TSVs With Low-Temperature Cu/Sn and BCB Hybrid Bond Scheme

Author

Chang, Yao-Jen ; Ko, Cheng-Ta ; Chen, Kuan-Neng

Author_Institution

Dept. of Electron. Eng., Nat. Chiao Tung Univ., Hsinchu, Taiwan

Volume

34

Issue

1

fYear

2013

fDate

Jan. 2013

Firstpage

102

Lastpage

104

Abstract

A wafer-level 3-D integration scheme using Cu through-silicon vias (TSVs) and fine-pitch Cu/Sn-BCB hybrid bonding was developed and investigated with electrical characterization and reliability assessment. The hybrid bonding could be achieved below 250 °C. Low Kelvin resistance and stable daisy chain resistance were achieved in 5- and 10- μm TSV test structures across the whole wafer. Without obvious deterioration in reliability test results, the integrated Cu TSV and hybrid bond scheme can be potentially designed for 3-D integration applications.

Keywords

reliability; three-dimensional integrated circuits; Kelvin resistance; TSV test structures; electrical characterization; hybrid bond scheme; hybrid bonding; reliability assessment; reliability test; stable daisy chain resistance; through silicon vias; wafer level 3D integration; Bonding; Kelvin; Resistance; Semiconductor device reliability; Through-silicon vias; Tin; 3-D integration; Hybrid bonding; through-silicon via (TSV);

fLanguage

English

Journal_Title

Electron Device Letters, IEEE

Publisher

ieee

ISSN

0741-3106

Type

jour

DOI

10.1109/LED.2012.2225136

Filename

6373692