• DocumentCode
    82636
  • Title

    A New LDMOSFET with Tunneling Junction for Improved On-State Performance

  • Author

    Goyal, Nitin ; Saxena, Raghvendra Sahai

  • Author_Institution
    Norwegian Univ. of Sci. & Technol., Trondheim, Norway
  • Volume
    34
  • Issue
    1
  • fYear
    2013
  • fDate
    Jan. 2013
  • Firstpage
    90
  • Lastpage
    92
  • Abstract
    We propose a new laterally diffused metal-oxide-semiconductor field-effect transistor (LDMOSFET) with a tunneling junction at the drain side to reduce its on-state resistance and improve the peak transconductance significantly, as compared with the conventional LDMOSFET device. Using 2-D numerical simulations in an ATLAS device simulator, we have shown that the proposed tunneling junction at the drain side results in 25% reduction in RON and 20% improvement in peak transconductance in an ~ 40-V device without any significant degradation in other performance parameters.
  • Keywords
    numerical analysis; power MOSFET; semiconductor junctions; tunnelling; 2D numerical simulation; ATLAS device simulator; LDMOSFET; RON; laterally diffused metal-oxide-semiconductor field-effect transistor; on-state performance; on-state resistance reduction; peak transconductance; tunneling junction; Current density; Inverters; Junctions; Logic gates; Performance evaluation; Transistors; Tunneling; Laterally diffused metal–oxide–semiconductor field-effect transistor (LDMOSFET); on-resistance; power MOSFET; simulation; transconductance; tunneling;
  • fLanguage
    English
  • Journal_Title
    Electron Device Letters, IEEE
  • Publisher
    ieee
  • ISSN
    0741-3106
  • Type

    jour

  • DOI
    10.1109/LED.2012.2225403
  • Filename
    6373693