DocumentCode
827789
Title
Gate recess engineering of pseudomorphic In0.30GaAs/GaAs HEMTs
Author
Cameron, N.I. ; Murad, S. ; McLelland, H. ; Asenov, A. ; Taylor, M.R.S. ; Holland, M.C. ; Beaumont, S.P.
Author_Institution
Nanoelectron. Res. Centre, Glasgow Univ., UK
Volume
32
Issue
8
fYear
1996
fDate
4/11/1996 12:00:00 AM
Firstpage
770
Lastpage
772
Abstract
The authors report how the performance of 0.12 μm GaAs pHEMTs is improved by controlling both the gate recess width, using selective dry etching, and the gate position in the source drain gap, using electron beam lithography. pHEMTs with a transconductance of 600 mS/mm, off state breakdown voltages >2 V, fτ of 120 GHz, f max of 180 GHz and MAG of 13.5 dB at 60 GHz are reported
Keywords
III-V semiconductors; electric breakdown; electron beam lithography; gallium arsenide; high electron mobility transistors; indium compounds; microwave field effect transistors; millimetre wave field effect transistors; sputter etching; 0.12 micron; 120 GHz; 13.5 dB; 180 GHz; 2 V; 60 GHz; 600 mS/mm; In0.30GaAs-GaAs; RIE; electron beam lithography; gate position; gate recess engineering; gate recess width; pseudomorphic HEMT; selective dry etching; source drain gap;
fLanguage
English
Journal_Title
Electronics Letters
Publisher
iet
ISSN
0013-5194
Type
jour
DOI
10.1049/el:19960489
Filename
491083
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