• DocumentCode
    82846
  • Title

    Design Exploration of Geometric Biclustering for Microarray Data Analysis in Data Mining

  • Author

    Benben Liu ; ChiWai Yu ; Wang, Doris Z. ; Cheung, Ray C. C. ; Hong Yan

  • Author_Institution
    Dept. of Electron. Eng., City Univ. of Hong Kong, Hong Kong, China
  • Volume
    25
  • Issue
    10
  • fYear
    2014
  • fDate
    Oct. 2014
  • Firstpage
    2540
  • Lastpage
    2550
  • Abstract
    Biclustering is an important technique in data mining for searching similar patterns. Geometric biclustering (GBC) method is used to reduce the complexity of the NP-complete biclustering algorithm. This paper studies three commonly used modern platforms including multi-core CPU, GPU and FPGA to accelerate this GBC algorithm. By analyzing the parallelizing property of the GBC algorithm, we design 1) a multi-threaded software running on a server grade multi-core CPU system, 2) a CUDA program for GPU to accelerate the GBC algorithm, and 3) a novel parameterizable and scalable hardware architecture implemented on an FPGA. Genes microarray pattern analysis is employed as an example to demonstrate performance comparisons on different platforms. In particular, we compare the speed and energy efficiency of the three proposed methods. We found that 1) GPU achieves the highest average speedup of 48 × compared to single-threaded GBC program, 2) Our FPGA design can achieve higher speedup of 4 × for the computation for large microarray, and 3) FPGA consumes the least energy, which is about 3.53 × more efficient than the single-threaded GBC program.
  • Keywords
    data analysis; data mining; field programmable gate arrays; graphics processing units; multi-threading; multiprocessing systems; pattern clustering; CUDA program; FPGA; GBC method; GPU; NP-complete biclustering algorithm; complexity reduction; compute unified device architecture; data mining; field programmable gate array; genes microarray pattern analysis; geometric biclustering technique; graphics processing unit; hardware architecture; microarray data analysis; multicore CPU; multithreaded software; single-threaded GBC program; Acceleration; Algorithm design and analysis; Clocks; Computer architecture; Field programmable gate arrays; Graphics processing units; Instruction sets; Geometric biclustering (GBC); field-programmable gate array (FPGA); graphics processing unit (GPU); microarray data;
  • fLanguage
    English
  • Journal_Title
    Parallel and Distributed Systems, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    1045-9219
  • Type

    jour

  • DOI
    10.1109/TPDS.2013.204
  • Filename
    6579602