• DocumentCode
    830449
  • Title

    Digitally controlled oscillator (DCO)-based architecture for RF frequency synthesis in a deep-submicrometer CMOS Process

  • Author

    Staszewski, Robert Bogdan ; Leipold, Dirk ; Muhammad, Khurram ; Balsara, Poras T.

  • Author_Institution
    Texas Instrum. Inc., Dallas, TX, USA
  • Volume
    50
  • Issue
    11
  • fYear
    2003
  • Firstpage
    815
  • Lastpage
    828
  • Abstract
    A novel digitally controlled oscillator (DCO)-based architecture for frequency synthesis in wireless RF applications is proposed and demonstrated. It deliberately avoids any use of an analog tuning voltage control line. Fine frequency resolution is achieved through high-speed ΣΔ dithering. Other imperfections of analog circuits are compensated through digital means. The presented ideas enable the employment of fully-digital frequency synthesizers using sophisticated signal processing algorithms, realized in the most advanced deep-submicrometer digital CMOS processes which allow almost no analog extensions. They also promote cost-effective integration with the digital back-end onto a single silicon die. The demonstrator test chip has been fabricated in a digital 0.13-μm CMOS process together with a DSP, which acts as a digital baseband processor with a large number of digital gates in order to investigate noise coupling. The phase noise is -112 dBc/Hz at 500-kHz offset. The close-in spurious tones are below -62 dBc, while the far-out spurs are below -80 dBc. The presented ideas have been incorporated in a commercial Bluetooth transceiver.
  • Keywords
    CMOS digital integrated circuits; application specific integrated circuits; digital phase locked loops; frequency synthesizers; phase noise; radiofrequency oscillators; transceivers; voltage-controlled oscillators; ASIC cell; Bluetooth transceiver; RF frequency synthesis; cost effective integration; deep-submicrometer CMOS; demonstrator test chip; digital PLL; digital compensation; digitally controlled oscillator architecture; fine frequency resolution; high-speed ΣΔ dithering; wireless RF; CMOS process; Circuit optimization; Circuit synthesis; Digital control; Frequency synthesizers; Radio frequency; Signal resolution; Tuning; Voltage control; Voltage-controlled oscillators;
  • fLanguage
    English
  • Journal_Title
    Circuits and Systems II: Analog and Digital Signal Processing, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    1057-7130
  • Type

    jour

  • DOI
    10.1109/TCSII.2003.819128
  • Filename
    1246359