DocumentCode :
830873
Title :
Multiplier policies for digital signal processing
Author :
Ma, Gin-Kou ; Taylor, Fred J.
Volume :
7
Issue :
1
fYear :
1990
Firstpage :
6
Lastpage :
20
Abstract :
The successful design of digital signal processing (DSP) systems and subsystems is often predicated on realizing fast multiplication in digital hardware. This tutorial provides the reader with a broad perspective of this important field and the pedagogy needed to understand the basic principles of digital multiplication. Both conventional and nonconventional methods of implementing multiplication, representing a mix of speed/complexity tradeoffs, are presented. Some are based on traditional shift-add structures, whereas others strive for greater mathematical sophistication. Topics include stand-alone fixed-point multipliers, cellular arrays, memory intensive policies, homomorphic systems, and modular arithmetic.<>
Keywords :
cellular arrays; computerised signal processing; digital arithmetic; multiplying circuits; cellular arrays; digital hardware; digital multiplication; digital signal processing; fast multiplication; homomorphic systems; memory intensive policies; modular arithmetic; shift-add structures; speed/complexity tradeoffs; stand-alone fixed-point multipliers; tutorial; Central Processing Unit; Computer architecture; Costs; Digital signal processing; Digital signal processing chips; Fixed-point arithmetic; Hardware; Logic devices; Signal design; Very large scale integration;
fLanguage :
English
Journal_Title :
ASSP Magazine, IEEE
Publisher :
ieee
ISSN :
0740-7467
Type :
jour
DOI :
10.1109/53.45968
Filename :
45968
Link To Document :
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