DocumentCode :
831254
Title :
MOS Hardening Approaches for Low-Temperature Applications
Author :
Srour, J.R. ; Chiu, K.Y.
Author_Institution :
Northrop Research and Technology Center Hawthorne, California 90250
Volume :
24
Issue :
6
fYear :
1977
Firstpage :
2140
Lastpage :
2146
Abstract :
Charge buildup in irradiated MOS devices is significantly more severe at low temperatures than at room temperature. Approaches for counteracting this problem are considered in this paper, including: (1) careful selection of the applied field; (2) ion implantation of the oxide; (3) use of a thin oxide. Experimental and analytical results are presented and it is demonstrated that the applied field dependence of flatband voltage shift in MOS capacitors irradiated at 77°K can be accounted for in terms of the field dependence of electron yield and the transport of holes at high fields. Analysis of ion implantation effects indicates that a significant improvement in radiation tolerance should be achievable by this method. A simultaneous consideration of the effects of oxide thickness and applied field on charge buildup in an unimplanted oxide suggests that reducing the thickness to ¿500 A° will largely eliminate low temperature problems in a steady-state ionizing radiation environment as long as the applied voltage is ¿ 10V.
Keywords :
Charge carrier processes; Ion implantation; Ionizing radiation; MOS capacitors; MOS devices; MOSFETs; Radiation hardening; Spontaneous emission; Temperature sensors; Threshold voltage;
fLanguage :
English
Journal_Title :
Nuclear Science, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9499
Type :
jour
DOI :
10.1109/TNS.1977.4329180
Filename :
4329180
Link To Document :
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