• DocumentCode
    832041
  • Title

    Emerging research memory and logic technologies

  • Author

    Zhirnov, Victor V. ; Hutchby, James A. ; Bourianoff, George I. ; Brewer, Joe E.

  • Author_Institution
    Semicond. Res. Corp., Durham, NC, USA
  • Volume
    21
  • Issue
    3
  • fYear
    2005
  • Firstpage
    47
  • Lastpage
    51
  • Abstract
    The purpose of this article is to introduce a set of technology relevance or evaluation criteria and, based on these criteria, to offer a critical assessment of those technology entries for memory and logic being considered for post CMOS-scaling information processing. Additionally, charge-based nanoelectronic devices are discussed in this article separately from those approaches proposing use of a new means for data representation or "state variable." This separate discussion addresses an important question related to new charge-based information-processing approaches concerning the fundamental limits of an elemental switch (size, energy, speed, etc.).
  • Keywords
    CMOS logic circuits; CMOS memory circuits; data structures; integrated circuit technology; nanoelectronics; CMOS-scaling information processing; charge-based nanoelectronic devices; critical assessment; data representation; elemental switch; evaluation criteria; logic technology; memory technology; technology relevance; CMOS logic circuits; CMOS technology; Error analysis; Error correction; Investments; Logic devices; Manufacturing; Nanoscale devices; Silicon; Throughput;
  • fLanguage
    English
  • Journal_Title
    Circuits and Devices Magazine, IEEE
  • Publisher
    ieee
  • ISSN
    8755-3996
  • Type

    jour

  • DOI
    10.1109/MCD.2005.1438812
  • Filename
    1438812