Title :
Emerging research memory and logic technologies
Author :
Zhirnov, Victor V. ; Hutchby, James A. ; Bourianoff, George I. ; Brewer, Joe E.
Author_Institution :
Semicond. Res. Corp., Durham, NC, USA
Abstract :
The purpose of this article is to introduce a set of technology relevance or evaluation criteria and, based on these criteria, to offer a critical assessment of those technology entries for memory and logic being considered for post CMOS-scaling information processing. Additionally, charge-based nanoelectronic devices are discussed in this article separately from those approaches proposing use of a new means for data representation or "state variable." This separate discussion addresses an important question related to new charge-based information-processing approaches concerning the fundamental limits of an elemental switch (size, energy, speed, etc.).
Keywords :
CMOS logic circuits; CMOS memory circuits; data structures; integrated circuit technology; nanoelectronics; CMOS-scaling information processing; charge-based nanoelectronic devices; critical assessment; data representation; elemental switch; evaluation criteria; logic technology; memory technology; technology relevance; CMOS logic circuits; CMOS technology; Error analysis; Error correction; Investments; Logic devices; Manufacturing; Nanoscale devices; Silicon; Throughput;
Journal_Title :
Circuits and Devices Magazine, IEEE
DOI :
10.1109/MCD.2005.1438812
