A unified approach to closed-loop time delay estimation systems

Two generalized configurations for a closed-loop delay estimation system (CLDES) are discussed. The indirect correlation (IC) configuration is compared to the conventional CLDES-the direct correlation (DC) configuration. It is shown that the baseband equivalents of the two configurations differ only by the input noise. However, the noise power in the IC configuration is far less than that of the DC configuration. Using the known procedure for calculation of the variance of the time-delay estimator, it is shown that the two configurations result in the same variance. However, this procedure is known to be incorrect since, for the direct correlation configuration (which is known to have an intrinsic noise that persists even when the input signals are ideal), the variance is nonzero for zero input signal-to-noise ratio (SNR). Thus, another procedure is suggested for variance calculation that overcomes this problem. It is shown, using this expression, that the variance of the time-delay estimator is smaller for the IC configuration, provided the input SNR is not less than 0 dB