DocumentCode
833067
Title
Implementing a /spl Sigma/ /spl Delta/ DAC in Fixed Point Arithmetic
Author
Engelberg, Shlomo
Author_Institution
Dept. of Electron., Jerusalem Coll. of Technol.
Volume
23
Issue
6
fYear
2006
Firstpage
66
Lastpage
69
Abstract
This paper describes a simple sigma delta (SigmaDelta) digital to analog converter (DAC) that is suitable for use on the simplest of microprocessors to generate constant level or slowly varying control voltages by taking advantage of a SigmaDelta network´s intrinsic limit cycle behavior. The paper describes the properties of the converter, and shows that it is inherently stable. It also explains how the user can control the dc level of the DAC´s analog output, and discusses the implementation of such a DAC on an industry standard microprocessor
Keywords
digital-analogue conversion; fixed point arithmetic; limit cycles; DAC analog output; SigmaDelta DAC; SigmaDelta network intrinsic limit cycle behavior; dc level; fixed point arithmetic; industry standard microprocessor; sigma delta digital-to-analog converter; slowly varying control voltages; Automata; Delta-sigma modulation; Digital-analog conversion; Electrical equipment industry; Equations; Fixed-point arithmetic; Limit-cycles; Low pass filters; Microprocessors; Voltage control;
fLanguage
English
Journal_Title
Signal Processing Magazine, IEEE
Publisher
ieee
ISSN
1053-5888
Type
jour
DOI
10.1109/SP-M.2006.248716
Filename
4015569
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