Title :
Extending integrated-circuit yield-models to estimate early-life reliability
Author :
Barnett, Thomas S. ; Singh, Adit D. ; Nelson, Victor P.
Author_Institution :
IBM Microelectron., Essex Junction, VT, USA
Abstract :
The integrated yield-reliability model for integrated circuits allows one to estimate the yield, following both wafer probe and burn-in testing. The model is based on the long observed clustering of defects and the experimentally verified relation between defects causing wafer probe failures, and defects causing infant mortality failures. The 2-parameter negative binomial distribution is used to describe the distribution of defects over a semiconductor wafer. The clustering parameter α, while known to play a key role in accurately determining wafer probe yields, is shown, for the first time, to play a similar role in determining burn-in fall-out. Numerical results indicate that the number of infant mortality failures predicted by the clustering model can differ appreciably from calculations that ignore clustering. This is particularly apparent when wafer probe yields are low, and clustering is high.
Keywords :
binomial distribution; integrated circuit reliability; integrated circuit yield; 2-parameter negative binomial distribution; burn-in fall-out; burn-in testing; defects clustering; early-life reliability estimation; infant mortality failures; integrated yield-reliability model; integrated-circuit yield-models; semiconductor wafer; wafer probe failures; Circuit testing; Digital integrated circuits; Integrated circuit modeling; Integrated circuit reliability; Integrated circuit testing; Integrated circuit yield; Manufacturing; Probes; Semiconductor device modeling; Yield estimation;
Journal_Title :
Reliability, IEEE Transactions on
DOI :
10.1109/TR.2003.816418