DocumentCode
833679
Title
FIR switched-capacitor decimators with active-delayed block polyphase structures
Author
Franca, J.E. ; Santos, S.
Author_Institution
Dept. de Engenheria Electrotecnica e de Computadores, Inst. Superior Tecnico, Lisbon, Portugal
Volume
35
Issue
8
fYear
1988
fDate
8/1/1988 12:00:00 AM
Firstpage
1033
Lastpage
1037
Abstract
Finite impulse-response (FIR) switched capacitor (SC) decimator circuits using previously proposed structures are not practical for applications requiring long impulse responses on account of a rather large (unrealistic) number of SC branches and switching waveforms. For such applications, polyphase structures are proposed that lead to FIR SC decimator circuits that use significantly fewer branches and switching waveforms, and are thus more attractive for integrated circuit implementation. The design of an FIR SC low-pass decimator with an amplitude response tailored for video interface applications is given as an example
Keywords
active filters; delays; low-pass filters; switched capacitor filters; FIR SC low-pass decimator; FIR switched-capacitor decimators; SC circuits; active filters; active-delayed block polyphase structures; amplitude response; finite impulse response; integrated circuit implementation; long impulse responses; video interface applications; Delay lines; Digital filters; Finite impulse response filter; Signal processing; Signal processing algorithms; Signal sampling; Smoothing methods; Speech processing; Switching circuits; Voltage;
fLanguage
English
Journal_Title
Circuits and Systems, IEEE Transactions on
Publisher
ieee
ISSN
0098-4094
Type
jour
DOI
10.1109/31.1853
Filename
1853
Link To Document