Design and implementation of a single-chip speech-to-speech translation system

Author

Wang, J.F. ; Lin, S.-C. ; Wang, J.-C. ; Yang, H.-W.

Author_Institution

Electr. Eng., Nat. Cheng Kung Univ., Taiwan

Volume

153

Issue

5

fYear

2006

fDate

10/1/2006 12:00:00 AM

Firstpage

416

Lastpage

426

Abstract

This work presents the first chip design for a portable speech-to-speech translation application. First, we construct a speech-to-speech translation system based on multiple-translation spotting (MTS). In terms of the proposed MTS method, the optimal multiple-translation spotting template is retrieved and the appropriate target patterns are extracted. To overcome the computational bottleneck due to the MTS algorithm, this work introduces a template retrieval core and a target pattern extraction core. Combined with a low cost programmable core, this work takes the most out of both programmable and application-specific architectures, including performance, design complexity, and flexibility. This design was experimentally verified via semi-custom chips using 0.35 mum CMOS single-poly-four-metal technology on a die of approximately 3.85times3.85 mm² size

Keywords

CMOS digital integrated circuits; application specific integrated circuits; integrated circuit design; language translation; speech recognition equipment; speech synthesis; 0.35 micron; CMOS integrated circuit; Mandarin Chinese-English translation system; application-specific architectures; integrated circuit design; multiple-translation spotting; programmable core; semicustom chips; single-chip design; single-poly-four-metal technology; speech-to-speech translation system; target pattern extraction core; template retrieval core;

fLanguage

English

Journal_Title

Circuits, Devices and Systems, IEE Proceedings -

Publisher

iet

ISSN

1350-2409

Type

jour

DOI

10.1049/ip-cds:20045067

Filename

4015849