Integrated pin electronics for VLSI functional testers

Author

Gasbarro, James A. ; Horowitz, Mark A.

Author_Institution

Xerox Palo Alto Res. Center, CA, USA

Volume

24

Issue

2

fYear

1989

fDate

4/1/1989 12:00:00 AM

Firstpage

331

Lastpage

337

Abstract

A fully integrated approach is presented for building the pin electronics portion of a VLSI functional tester. The system implements the output vector timing and formatting functions, as well as the input sampling and comparison operations. A computer-controlled feedback loop is employed to obtain a timing accuracy of better than 1 ns. Novel circuit designs are shown which make the circuit suitable for fabrication in a high-density MOS technology. An experimental chip using these techniques was fabricated in 2- mu m CMOS technology and functioned at over 30 megavectors per second.<>

Keywords

CMOS integrated circuits; automatic test equipment; integrated circuit testing; 2 micron; 30 megavectors per second; CMOS technology; VLSI functional testers; comparison operations; computer-controlled feedback loop; experimental chip; formatting functions; high-density MOS technology; input sampling; integrated pin electronics; output vector timing; timing accuracy; Accuracy; Buildings; CMOS technology; Circuit synthesis; Circuit testing; Electronic equipment testing; Feedback loop; Sampling methods; Timing; Very large scale integration;

fLanguage

English

Journal_Title

Solid-State Circuits, IEEE Journal of

Publisher

ieee

ISSN

0018-9200

Type

jour

DOI

10.1109/4.18593

Filename

18593