Title :
Ultrafast compact 32-bit CMOS adders in multiple-output domino logic
Author :
Hwang, Inseok S. ; Fisher, Aaron L.
Author_Institution :
AT&T Bell Lab., Allentown, PA, USA
fDate :
4/1/1989 12:00:00 AM
Abstract :
A dynamic CMOS logic style, called multioutput domino logic (MODL), has been developed. In this logic style, single logic gates produce multiple functions, and a circuit´s device count can be reduced by a factor of more than 2, depending on the degree of recurrence in the circuit. In addition, MODL circuits are, by construction, considerably more stable than other dynamic circuits including conventional domino. A 32-bit carry lookahead (CLA) structure which reduces the adder´s worst-case path by two logic stages has also been devised. This CLA structure has been developed to effectively utilize the advantages of MODL. Taken together, these developments have resulted in two 32-bit CMOS adders, providing area and speed improvements of 1.5* and 1.7* over the combination of the domino and conventional CLA techniques. Both adders have been fabricated in a standard 0.9- mu m two-level metal CMOS technology, and measured results show that the straight adder has achieved 32-bit addition times of less than 3.1 ns at 25 degrees C with V/sub DD/+5.0 V.<>
Keywords :
CMOS integrated circuits; adders; integrated logic circuits; 0.9 micron; 25 C; 3.1 ns; 32 bit; 32-bit CMOS adders; 5 V; MODL; area reduction; carry lookahead; device count reduction; dynamic CMOS logic style; measured results; multioutput domino logic; multiple-output domino logic; single logic gates produce multiple functions; speed improvements; straight adder; two-level metal CMOS technology; ultrafast compact adders; Adders; Arithmetic; CMOS logic circuits; CMOS process; CMOS technology; Logic circuits; Logic devices; Logic gates; Measurement standards; Very large scale integration;
Journal_Title :
Solid-State Circuits, IEEE Journal of
