Title :
Skewed Repeater Bus: A Low-Power Scheme for On-Chip Buses
Author :
Ghoneima, Maged M. ; Khellah, Muhammad M. ; Tschanz, James ; Ye, Yibin ; Kurd, Nasser ; Barkatullah, Javed S. ; Nimmagadda, Srikanth ; Ismail, Yehea ; De, Vivek K.
Author_Institution :
NVIDIA Corp., Santa Clara, CA
Abstract :
This paper purposes a bus architecture called skewed repeater bus (SRB) for reducing on-chip interconnect energy in microprocessors. By introducing a dynamic relative delay between neighboring bus lines, SRB reduces both average and worst-case coupling capacitance between those lines. SRB is compared to previously published techniques like delayed data bus (DDB) and delayed clock bus (DCB). Simulation results in 65-nm process show that bus energy reduction of 18% is achieved when SRB is applied to a real microprocessor example, versus 11% and 7% only for DDB and DCB, respectively.
Keywords :
integrated circuit interconnections; low-power electronics; microprocessor chips; delayed clock bus; delayed data bus; dynamic relative delay; low-power scheme; microprocessors; on-chip buses; on-chip interconnect energy; skewed repeater bus; Capacitance; Capacitors; Clocks; Coupling circuits; Delay; Energy dissipation; Integrated circuit interconnections; Microprocessors; Repeaters; Switches; Coupling capacitance; interconnects; low-power design; on-chip bus; repeater;
Journal_Title :
Circuits and Systems I: Regular Papers, IEEE Transactions on
DOI :
10.1109/TCSI.2008.928527
