Latchup Screening of LSI Devices

An experimental program is outlined which was developed for latchup screening of LSI devices in case the Latchup Analysis Technique cannot be used. The basic approach was to determine the most latchup prone operating conditions experimentally for each LSI type by testing the latchup susceptibilities under hundreds of selected input combinations. The most sensitive conditions are then to be used for the 100% radiation screening of prime parts. The instrumentation required to implement this approach, and the results of the latchup tests obtained for five types of LSI devices are described. The results included the finding of a relatively large temperature effect on latchup sensitivity in CMOS RAMs; the implication of this effect on latchup hardness assurance techniques, such as lot sampling, is also discussed.