Title :
Arithmetic binary to residue encoders for moduli (2n±2k+1)
Author_Institution :
Electron. Eng. Dept., Princess Sumaya Univ. for Technol., Amman, Jordan
Abstract :
A binary-to-residue encoder design that encodes the binary value into modulo (2n±2k+1) residue digits is introduced. Such encoders are important for the newly introduced moduli set: (2n,2n-1,2n+1,2n-2k+1,2n+2k+1), where k is a positive integer, and n=2k-1. The proposed design utilises n bit carry-save adders and carry-propagate adders. A VLSI layout implementation based on 0.5 μm CMOS technology is presented. The area and delay requirements of the new encoders are shown to be less than another reported encoder.
Keywords :
CMOS integrated circuits; VLSI; circuit layout CAD; decoding; residue number systems; CMOS technology; VLSI layout implementation; area requirements; arithmetic binary; binary-to-residue encoder design; carry-propagate adders; carry-save adders; delay requirements; moduli set; modulo residue digits; residue encoders;
Journal_Title :
Computers and Digital Techniques, IEE Proceedings -
DOI :
10.1049/ip-cdt:20031029