DocumentCode
83602
Title
Design methodology for optimising a high insulation voltage insulated gate bipolar transistor gate driver signal transmission function
Author
Sokchea Am ; Lefranc, Pierre ; Frey, David
Author_Institution
G2Elab, Univ. of Grenoble Alpes, Grenoble, France
Volume
8
Issue
6
fYear
2015
fDate
6 2015
Firstpage
1035
Lastpage
1042
Abstract
In this study, a design methodology for optimising a signal transmission function for high galvanic insulation (up to 30 kV) insulated gate bipolar transistor gate driver is proposed. The technology is based on a printed circuit board magnetic planar transformer with electronic circuits for excitation and reception. The objective of this study is to optimise the geometric elements of the transformer and its associated electronics devices with the help of a virtual prototyping tool. A bi-objective problem of the overall system that leads to a Pareto front is presented. Several Pareto fronts´ results are obtained assuming different insulation layers thickness. The chosen transformer solution is justified and depends on the bi-objective functions and the galvanic insulation level of the system. Moreover, the experimental results are compared with the simulation results. Finally, the comparisons between experimental and simulation results are proposed to lead to a conclusion of this methodology.
Keywords
Pareto analysis; driver circuits; insulated gate bipolar transistors; printed circuits; transformers; IGBT; PCB magnetic planar transformer; Pareto front; biobjective problem; design methodology; electronic circuits; electronics devices; excitation; galvanic insulation level; geometric elements; high insulation voltage; insulated gate bipolar transistor gate driver; insulation layers thickness; printed circuit board; reception; signal transmission function; virtual prototyping tool;
fLanguage
English
Journal_Title
Power Electronics, IET
Publisher
iet
ISSN
1755-4535
Type
jour
DOI
10.1049/iet-pel.2014.0434
Filename
7115304
Link To Document