DocumentCode :
836082
Title :
High-Performance Architecture of Elliptic Curve Scalar Multiplication
Author :
Ansari, Bijan ; Hasan, M. Anwar
Author_Institution :
Electr. Eng. Dept., Univ. of California, Los Angeles, CA
Volume :
57
Issue :
11
fYear :
2008
Firstpage :
1443
Lastpage :
1453
Abstract :
A high performance architecture of elliptic curve scalar multiplication based on the Montgomery ladder method over finite field GF(2m) is proposed. A pseudo-pipelined word serial finite field multiplier with word size w, suitable for the scalar multiplication is also developed. Implemented in hardware, this system performs a scalar multiplication in approximately 6⌈m/w⌉(m−1) clock cycles and the gate delay in the critical path is equal to TAND + ⌈log2(w/k)⌉TXOR, where TAND and TXOR are delays due to two-input AND and XOR gates respectively and 1 ≤ k ≪ w is used to shorten the critical path.
Keywords :
cryptography; logic gates; AND gates; Montgomery ladder method; XOR gates; clock cycles; critical path; elliptic curve cryptosystems; elliptic curve scalar multiplication; gate delay; high-performance architecture; pseudopipelined word-serial finite field multiplier; Arithmetic; Change detection algorithms; Clocks; Delay; Elliptic curves; Galois fields; Hardware; Parallel processing; Pipeline processing; Runtime; Elliptic curves; finite fields; scalar multiplication;
fLanguage :
English
Journal_Title :
Computers, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9340
Type :
jour
DOI :
10.1109/TC.2008.133
Filename :
4599568
Link To Document :
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