Title :
Status of the Interlaboratory Development of a High-Speed Standard Data Bus - FASTBUS
Author_Institution :
Stanford Linear Accelerator Center Stanford Univesity, Stanford, California 94305
Abstract :
The FASTBUS project is an interlaboratory effort to develop a next generation laboratory standard data bus. The principal design goals are high speed (<100 nsec per word block transfers), wide data path (32 bits), identical parallel addressing architectures at both system and sub-system levels, ability to support multiple parallel master controllers, and ability to support special modes of operation for high energy physics applications. The current status of development is briefly described.
Keywords :
Backplanes; Computer architecture; Control systems; Fastbus; Laboratories; Linear accelerators; Master-slave; Protocols; Standards development; Topology;
Journal_Title :
Nuclear Science, IEEE Transactions on
DOI :
10.1109/TNS.1979.4329708