Analysis and simulation of automatic bias reduction circuit in a coherent detector

The circuit analysis and performance simulation of the auto zero circuit (AZC) of a coherent detector are presented. Also the characteristics of the auto zero circuit in such a detector are investigated. Computer simulation verifies that the convergence time of the residual bias is inversely proportional to the amplitude of the gain in the auto zero circuit, and the residual bias of the coherent detector is proportional to the amplitude of the gain. For a specified receiver noise power and the tolerable residual bias of the coherent detector, the required parameters of an auto zero circuit can be selected using the results developed in the paper