Analysis of current flow in polycrystalline TFTs

A model for predicting the change of currents at the surface of polycrystalline materials for both ohmic and blocking contacts is developed. The model includes electron/hole traps within grain boundaries that are comparable in thickness to that of the dielectric on the surface of the polycrystalline semiconductor. The grains and their interfaces with the dielectric are assumed to be trap free. Account is also taken of the reducing carrier Debye Length as the surface carrier concentration is increased, from its intrinsic value, by the field effect. The net surface conductance is obtained by integrating the carrier density across the surface region through to the back of the material. Four regimes are identified: quasi-drift and quasi-diffusion for the high and low current regimes when there is a good supply of carriers and generation and quasi-diffusion when there is a limited supply of carriers. The analytical relationships are found to give satisfactory agreement with results for the temperature and field dependence of surface conductance in polycrystalline silicon in these regimes. The dependence of surface conductance on field effect voltage is found, at lower currents, to be a means of determining the energy distribution of electron/hole traps.