Title :
Simple approach for generating active-compensated building blocks
Author :
Senani, Raj ; Chauhan, Vishakha
Author_Institution :
MNR Eng. Coll., Allahabad
fDate :
7/21/1988 12:00:00 AM
Abstract :
A simple approach is presented for synthesising active compensated voltage-controlled-voltage-source (VCVS) circuits (providing negligible magnitude error and negligible phase error) employing three op-amps and a few resistors
Keywords :
active networks; compensation; linear network synthesis; VCVS; active compensated voltage-controlled-voltage-source; active compensation; active-compensated building blocks; negligible magnitude error; negligible phase error; three op-amp VCVS circuits;
Journal_Title :
Electronics Letters
