Title :
Shallow Trench Isolation for the 45-nm CMOS Node and Geometry Dependence of STI Stress on CMOS Device Performance
Author :
Tilke, Armin T. ; Stapelmann, Chris ; Eller, Manfred ; Bach, Karl-Heinz ; Hampp, Roland ; Lindsay, Richard ; Conti, Richard ; Wille, William ; Jaiswal, Rakesh ; Galiano, Maria ; Jain, Alok
Author_Institution :
Infineon Technol. Dresden
fDate :
5/1/2007 12:00:00 AM
Abstract :
In the present work, a high aspect ratio process (HARP) using a new O3/TEOS based sub atmospheric chemical vapor deposition process was implemented as STI gapfill in sub-65-nm CMOS. Good gapfill performance up to aspect ratios greater than 10:1 was demonstrated. Since the HARP process does not attack the STI liner as compared to HDP, a variety of different STI liners can be implemented. By comparing HARP with HDP, the geometry dependence of nand p-FET performance due to STI stress is discussed
Keywords :
CMOS integrated circuits; chemical vapour deposition; isolation technology; oxygen; 45 nm; CMOS device performance; CMOS node; O3; STI liners; STI stress; gapfill performance; geometry dependence; high aspect ratio process; n-FET performance; p-FET performance; shallow trench isolation; subatmospheric chemical vapor deposition process; CMOS process; CMOS technology; Chemical technology; Chemical vapor deposition; Dielectric devices; Etching; Geometry; Isolation technology; Plasma chemistry; Thermal stresses; HARP; high aspect ratio process; shallow trench isolation; stress;
Journal_Title :
Semiconductor Manufacturing, IEEE Transactions on
DOI :
10.1109/TSM.2007.896632
