DocumentCode
841278
Title
Comparative Evaluation of Pulsewidth Modulation Strategies for Z-Source Neutral-Point-Clamped Inverter
Author
Loh, Poh Chiang ; Blaabjerg, Frede ; Wong, Chow Pang
Author_Institution
Sch. of Electr. & Electron. Eng., Nanyang Technol. Univ., Singapore
Volume
22
Issue
3
fYear
2007
fDate
5/1/2007 12:00:00 AM
Firstpage
1005
Lastpage
1013
Abstract
Z-source neutral-point-clamped (NPC) inverter has recently been proposed as an alternative three-level buck-boost power conversion solution with an improved output waveform quality. In principle, the designed Z-source inverter functions by selectively "shooting through" its power sources, coupled to the inverter using two unique Z-source impedance networks, to boost the inverter three-level output waveform. Proper modulation of the new inverter would therefore require careful integration of the selective shoot-through process to the basic switching concepts to achieve maximal voltage-boost, minimal harmonic distortion, lower semiconductor stress, and minimal number of device commutations per switching cycle. To date, the theoretical background on Z-source NPC modulation has not been fully established, and it is the theme of this paper to propose a number of enhanced voltage-boost pulsewidth modulation (PWM) strategies for controlling the Z-source NPC inverter. While developing the PWM techniques, attention has been devoted to carefully derive them from a common generic basis for improved portability, easier implementation, and most importantly, assisting readers in understanding all concepts that have been presented. The presented strategies are also comparatively evaluated to identify their individual advantages and disadvantages, which are subsequently summarized in a comprehensive reference table. Last, simulation and experimental results are included for validating the performances and practicalities of the presented modulation schemes
Keywords
PWM invertors; commutation; design engineering; harmonic distortion; Z-source impedance networks; Z-source neutral point clamped inverter; harmonic distortion; pulsewidth modulation strategies; selective shoot-through process; semiconductor stress; three-level buck-boost power conversion; three-level output waveform; Harmonic distortion; Impedance; Power conversion; Power semiconductor switches; Pulse inverters; Pulse modulation; Pulse width modulation; Pulse width modulation inverters; Stress; Voltage; Buck-boost inverters; Z-source inverters; neutral-point-clamped (NPC) inverters; pulsewidth modulation (PWM);
fLanguage
English
Journal_Title
Power Electronics, IEEE Transactions on
Publisher
ieee
ISSN
0885-8993
Type
jour
DOI
10.1109/TPEL.2007.895015
Filename
4182471
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