Author_Institution :
Dept. of Electr. & Comput. Eng., Polytech. Univ., Brooklyn, NY
Abstract :
As the broadband access technologies, such as DSL, cable modem, and gigabit Ethernet, are providing affordable broadband solutions to the Internet from home and the enterprise, it is required to build next generation routers with high-speed interfaces (e.g., 10 or 40 Gb/s) and large switching capacity (e.g., multipetabit). This paper first points out the issues of building such routers, such as memory speed constraint, packet arbitration bottleneck, and interconnection complexity. It then presents several algorithms/architectures to implement IP route lookup, packet classification, and switch fabrics. Some of the functions, such as packet classification, route lookup, and traffic management, can be implemented with emerging network processors that have the advantages of providing flexibility to new applications and protocols, shortening the design cycle and time-to-market, and reducing the implementation cost by avoiding the ASIC approach. Several proposed algorithms for IP route lookup and packet classification are compared in respect to their search/update speeds and storage requirements. Different efficient arbitration schemes for output port contention resolution are presented and analyzed. The paper also surveys various switch architectures of commercial routers and switch chip sets. At the end, it outlines several challenging issues that remain to be researched for next generation routers
Keywords :
broadband networks; electronic switching systems; packet switching; reviews; subscriber loops; table lookup; telecommunication network routing; telecommunication traffic; transport protocols; 10 Gbit/s; 40 Gbit/s; DSL; IP route lookup; Internet; algorithms/architectures; arbitration schemes; broadband access technologies; cable modem; commercial routers; design cycle; gigabit Ethernet; high-speed interfaces; implementation cost reduction; interconnection complexity; large switching capacity; memory speed constraint; network processors; next generation routers; output port contention resolution; packet arbitration bottleneck; packet classification; protocols; route lookup; search/update speeds; storage requirements; switch architectures; switch chip sets; switch fabrics; time-to-market; traffic management; Buildings; DSL; Ethernet networks; Fabrics; Internet; Memory management; Modems; Packet switching; Switches; Telecommunication traffic;