DocumentCode :
841445
Title :
Elliptic-Curve-Based Security Processor for RFID
Author :
Lee, Yong Ki ; Sakiyama, Kazuo ; Batina, Lejla ; Verbauwhede, Ingrid
Author_Institution :
Electr. Eng. Dept., Univ. of California, Los Angeles, CA
Volume :
57
Issue :
11
fYear :
2008
Firstpage :
1514
Lastpage :
1527
Abstract :
RFID (Radio Frequency IDentification) tags need to include security functions, yet at the same time their resources are extremely limited. Moreover, to provide privacy, authentication and protection against tracking of RFID tags without loosing the system scalability, a public-key based approach is inevitable, which is shown by M. Burmester et al. In this paper, we present an architecture of a state-of-the-art processor for RFID tags with an Elliptic Curve (EC) processor over GF(2^163). It shows the plausibility of meeting both security and efficiency requirements even in a passive RFID tag. The proposed processor is able to perform EC scalar multiplications as well as general modular arithmetic (additions and multiplications) which are needed for the cryptographic protocols. As we work with large numbers, the register file is the most critical component in the architecture. By combining several techniques, we are able to reduce the number of registers from 9 to 6 resulting in EC processor of 10.1K gates. To obtain an efficient modulo arithmetic, we introduce a redundant modular operation. Moreover the proposed architecture can support multiple cryptographic protocols. The synthesis results with a 0.13 um CMOS technology show that the gate area of the most compact version is 12.5K gates.
Keywords :
microprocessor chips; public key cryptography; radiofrequency identification; telecommunication security; RFID; elliptic-curve-based security processor; public-key based approach; radio frequency identification; redundant modular operation; register file; Arithmetic; Authentication; CMOS technology; Cryptographic protocols; Privacy; Protection; RFID tags; Radiofrequency identification; Registers; Security; Compu; General; Low-power design; Micro-architecture implementation considerations; Processor Architectures; Special-purpose; Support for security;
fLanguage :
English
Journal_Title :
Computers, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9340
Type :
jour
DOI :
10.1109/TC.2008.148
Filename :
4604657
Link To Document :
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