Title :
High-speed digital-to-analogue convertor using passive switched-capacitor algorithmic conversion
Author :
Franca, J.E. ; Vital, J.C.
fDate :
8/18/1988 12:00:00 AM
Abstract :
A purely passive parasitic-compensated switched-capacitor circuit is shown to implement a simple signal conversion algorithm consisting of a mere charge division between equal valued capacitors. Such a circuit is the core of the new digital-to-analogue convertor described, and which is particularly suitable for high-frequency applications. Appropriate design conditions are established to render the overall circuit insensitive to the offset voltage and finite DC gain errors of the amplifier
Keywords :
compensation; digital-analogue conversion; switched capacitor networks; D/A convertor; DAC; SC circuit; charge division; design conditions; digital-to-analogue convertor; equal valued capacitors; finite DC gain errors; high speed operation; high-frequency applications; offset voltage; parasitic-compensated; passive switched-capacitor algorithmic conversion; signal conversion algorithm;
Journal_Title :
Electronics Letters