DocumentCode
841578
Title
A First-Order Tree-Structured DAC With Reduced Signal-Band Noise
Author
Hsieh, Hong-Yean ; Lin, Leon
Author_Institution
Real Commun. Inc, San Jose, CA
Volume
54
Issue
5
fYear
2007
fDate
5/1/2007 12:00:00 AM
Firstpage
392
Lastpage
396
Abstract
A mismatch-shaping tree-structured digital-to-analog converter (DAC) utilizes several layers of switching blocks to spectrally shape the DAC circuit errors. A first-order mismatch-shaping DAC using un-dithered switching sequences for the switching blocks results in spurious tones in the DAC noise. The unwanted tones can be eliminated from the DAC noise by employing white dither sequences to randomly select two types of short root symbols to be placed in the switching sequences. Dithered switching sequences, unfortunately, result in a higher noise floor in the DAC noise, in comparison with un-dithered switching sequences. In this brief, we propose an improved first-order sequencing logic to eliminate unwanted tones while causing only a modest increase in the in-band noise floor at a very modest hardware cost. Our mismatch-shaping sequencing logic is based on the scheme using a white dither sequence to randomly select each symbol between two specific types of long root symbols. Alternatively, our scheme can be viewed as using a high-pass dither sequence to randomly select the short root symbols. An analytical formula for the power-spectral density of the proposed switching sequence is presented to show its improvement over the prior first-order switching sequence. It is also shown from numerical simulations that the proposed switching sequence improves the signal-to-noise plus distortion ratio by more than 5 dB for a sigma-delta modulator with static DAC-element errors chosen from a Gaussian distribution with a standard deviation of 1%
Keywords
Gaussian distribution; circuit noise; digital-analogue conversion; sequential circuits; sigma-delta modulation; DAC noise; Gaussian distribution; first-order tree structured digital-to-analog converter; mismatch shaping sequencing logic; power-spectral density; short root symbols; sigma-delta modulator; signal-band noise; switching sequences; white dither sequences; Circuit noise; Costs; Digital-analog conversion; Hardware; Logic; Noise reduction; Noise shaping; Numerical simulation; Switching circuits; White noise; Dither; mismatch shaping; sigma–delta $(Sigma Delta)$ modulator; tree-structured digital-to-analog converter (DAC);
fLanguage
English
Journal_Title
Circuits and Systems II: Express Briefs, IEEE Transactions on
Publisher
ieee
ISSN
1549-7747
Type
jour
DOI
10.1109/TCSII.2007.892397
Filename
4182501
Link To Document