Title :
Packaging technology for the NEC SX-3 supercomputers
Author :
Murano, Hiroshi ; Watari, Toshikiko
Author_Institution :
NEC Corp., Tokyo, Japan
fDate :
8/1/1992 12:00:00 AM
Abstract :
Since the performance of a computer system is mainly related to the machine cycle time, improvement of the logic circuit delay is the key for high-speed operations. In order to show how to reduce the logic circuit delay, the characteristics required for LSI chips and packaging technologies are discussed and the technological trends in packaging and their limitations are considered. As a typical application of high-performance packaging technology, the NEC SX-3 Supercomputer packaging is introduced, featuring 9 in2 polyimide-ceramic substrates, a microchip carrier, flipped TAB carrier (FTC), high-density multichip packaging, high-speed coaxial cable interconnections, and a water cooling system
Keywords :
coaxial cables; cooling; large scale integration; mainframes; multichip modules; packaging; LSI chips; NEC SX-3 supercomputers; flipped TAB carrier; high-density multichip packaging; high-performance packaging; high-speed coaxial cable interconnections; high-speed operations; logic circuit delay; microchip carrier; packaging technologies; polyimide-ceramic substrates; water cooling system; Coaxial cables; Cooling; Delay effects; High performance computing; Integrated circuit interconnections; Large scale integration; Logic circuits; National electric code; Packaging machines; Supercomputers;
Journal_Title :
Components, Hybrids, and Manufacturing Technology, IEEE Transactions on
