• DocumentCode
    841865
  • Title

    Modeling Rapid Annealing in Digital Integrated Circuits

  • Author

    Duncan, L.W. ; Mallon, C.E.

  • Author_Institution
    IRT Corporation San Diego, California 92138
  • Volume
    26
  • Issue
    6
  • fYear
    1979
  • Firstpage
    4750
  • Lastpage
    4757
  • Abstract
    An analytical model for the effects of rapid annealing in narrow base bipolar transistors has been developed. This model utilizes transistor base-emitter voltage and an empirical curve to calculate annealing factor with time. The model has been incorporated into the TRAC circuit analysis code and used to predict the time-dependent response of a low-power Schottky TTL NAND gate and a four-bit shift register as a function of neutron fluence and operating condition.
  • Keywords
    Analytical models; Annealing; Bipolar transistors; Circuit analysis; Digital integrated circuits; Integrated circuit modeling; Neutrons; Predictive models; Shift registers; Voltage;
  • fLanguage
    English
  • Journal_Title
    Nuclear Science, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9499
  • Type

    jour

  • DOI
    10.1109/TNS.1979.4330222
  • Filename
    4330222
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=841865