Title :
A multichip packaged GaAs 16×16 parallel multiplier
Author :
Sekiguchi, Takeshi ; Sawada, Sosaku ; Hirose, Takaaki ; Nishiguchi, Masanori ; Shiga, Nobuo ; Hayashi, Hideki
Author_Institution :
Sumitomo Electric Ind. Ltd., Yokohama, Japan
fDate :
8/1/1992 12:00:00 AM
Abstract :
A GaAs 16×16 bit parallel multiplier utilizing multichip packaging technology is demonstrated. This multichip approach is undertaken in an effort to realize GaAs ULSIs with high yield and reliability, using multiple smaller scale integrated circuits. The device is composed of four GaAs 8×8 expandable parallel multipliers and a multichip package (MCP). The developed 8×8 b multipliers consist of 1097 E/D DCFL gates each and have a 2.4-ns multiplication time. The developed MCP is composed of five layers of alumina ceramic which include 50-Ω strip lines. The multiplication time of this 16×16 b multichip multiplier is 7.6 ns, and the total production yield is 70%
Keywords :
III-V semiconductors; field effect integrated circuits; gallium arsenide; integrated logic circuits; multichip modules; multiplying circuits; packaging; 16 bit; 16×16 parallel multiplier; 2.4 ns; 50 ohm; 50-Ω strip lines; 7.6 ns; E/D DCFL gates; GaAs; MCP; expandable parallel multipliers; multichip package; multichip packaging technology; multiplication time; production yield; semiconductors; Delay; Frequency; Gallium arsenide; Gold; Insertion loss; Loss measurement; Packaging; Power dissipation; Silicon; Strips;
Journal_Title :
Components, Hybrids, and Manufacturing Technology, IEEE Transactions on
